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module multiplier_4x4(P,A,B);
input [3:0]A,B;
output [7:0]P;
wire [23:1]W;
and a1(P[0],A[0],B[0]);
and a2(W[1],A[1],B[0]);
and a3(W[2],A[2],B[0]);
and a4(W[3],A[3],B[0]);
and a5(W[4],A[0],B[1]);
and a6(W[5],A[1],B[1]);
and a7(W[6],A[2],B[1]);
and a8(W[7],A[3],B[1]);
and a9(W[8],A[0],B[2]);
and a10(W[9],A[1],B[2]);
and a11(W[10],A[2],B[2]);
and a12(W[11],A[3],B[2]);
and a13(W[12],A[0],B[3]);
and a14(W[13],A[1],B[3]);
and a15(W[14],A[2],B[3]);
and a16(W[15],A[3],B[3]);
adder_4bit PA1({W[18],W[17],W[16],P[1]},W[19],{1'b0,W[3],W[2],W[1]},{W[7],W[6],W[5],W[4]});
adder_4bit PA2({W[22],W[21],W[20],P[2]},W[23],{W[19],W[18],W[17],W[16]},{W[11],W[10],W[9],W[8]});
adder_4bit PA3({P[6],P[5],P[4],P[3]},P[7],{W[23],W[22],W[21],W[20]},{W[15],W[14],W[13],W[12]});
endmodule

module adder_4bit(s,cout,a,b);
input [3:0]a;
input [3:0]b;
output [3:0]s;
output cout;
wire[3:1]c;
full_adder FA0(a[0],b[0],1'b0,s[0],c[1]);
full_adder FA1(a[1],b[1],c[1],s[1],c[2]);
full_adder FA2(a[2],b[2],c[2],s[2],c[3]);
full_adder FA3(a[3],b[3],c[3],s[3],cout);
endmodule

module full_adder(a,b,cin,s,c);
input a,b,cin;
output s,c;
assign s=a^b^cin;
assign c=(a&b)|(b&cin)|(a&cin);
endmodule





module multiplier_4x4_tb;
reg [3:0]A;
reg [3:0]B;
wire [7:0]P;
multiplier_4x4 uut(.P(P),.A(A),.B(B));
initial begin
A=13;B=11;#100;
A=10;B=11;#100;
end
endmodule