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/* --COPYRIGHT--,BSD_EX * Copyright (c) 2014, Texas Instruments Incorporated * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * * Neither the name of Texas Instruments Incorporated nor the names of * its contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * ******************************************************************************* * * MSP430 CODE EXAMPLE DISCLAIMER * * MSP430 code examples are self-contained low-level programs that typically * demonstrate a single peripheral function or device feature in a highly * concise manner. For this the code may rely on the device's power-on default * register values and settings such as the clock configuration and care must * be taken when combining code from several examples to avoid potential side * effects. Also see www.ti.com/grace for a GUI- and www.ti.com/msp430ware * for an API functional library-approach to peripheral configuration. * * --/COPYRIGHT--*/ //****************************************************************************** // MSP430FR235x Demo - Configure MCLK for 24MHz operation, and REFO sourcing // FLLREF and ACLK. // // Description: Configure MCLK for 24MHz. FLL reference clock is REFO. At this // speed, the FRAM requires wait states. // ACLK = default REFO ~32768Hz, SMCLK = MCLK = 24MHz. // Toggle LED to indicate that the program is running. // // MSP430FR2355 // --------------- // /|\| | // | | | // --|RST | // | | // | | // | P3.4 |---> SMCLK = 250kMHz // P3.0 |---> MCLK = 2MHz // | P1.1 |---> ACLK = 32768Hz // // // Darren Lu // Texas Instruments Inc. // Oct. 2016 // Built with IAR Embedded Workbench v6.50 & Code Composer Studio v6.2 //****************************************************************************** #include <msp430.h> int main(void) { //WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer //Configurarea modulului wdt WDTCTL = WDTPW+WDTSSEL_0+WDTTMSEL_1+WDTCNTCL+WDTIS_2; // WDTMSSEL_0 = SELECTAM SURSA DE TACT SMCLK // WDTTMSEL_1 = SELECTRAM MODUL DE FUNCTIONARE CA TIMER //WDTCNTCL = ADUCEM STAREA NUMARATORULUI IN 0 //WDTIS_2 = CONFIGURAM TIMER SA GEN. INT. Q23 //T_int = T_SMCLK*Qx //T_int = 4us * 8.388.608 //T_INT = 33.554 SECUNDE // Configure two FRAM waitstate as required by the device datasheet for MCLK // operation at 24MHz(beyond 8MHz) _before_ configuring the clock system. // FRCTL0 = FRCTLPW | NWAITS_2; __bis_SR_register(SCG0); // disable FLL CSCTL3 |= SELREF__REFOCLK; // Set REFO as FLL reference source CSCTL0 = 0; // clear DCO and MOD registers CSCTL1 |= DCORSEL_1; // Set DCO = 2MHz CSCTL2 = FLLD_0 + 61; // DCOCLKDIV = 24MHz __delay_cycles(3); __bic_SR_register(SCG0); // enable FLL while(CSCTL7 & (FLLUNLOCK0 | FLLUNLOCK1)); // FLL locked CSCTL4 = SELMS__DCOCLKDIV | SELA__REFOCLK; // set default REFO(~32768Hz) as ACLK source, ACLK = 32768Hz //DIVIZAM MCLK=2MHz CU 8 PENTRU A OBTINE SMCLK=250 KHz CSCTL5 = DIVS_3; // default DCOCLKDIV as MCLK and SMCLK source //configuram P3.4 ca iesire semnal - de tact SMCLK P3DIR |= BIT4; // set ACLK SMCLK and LED pin as output P3SEL0 |= BIT4; // set ACLK and SMCLK pin as second function //configuram P3.0 ca iesire semnal - de tact MCLK P3DIR |= BIT0; P3SEL0 |= BIT0; //CONFIGURAM P3.7 CA IESIRE CU STAREA IN 0 P3DIR |= BIT7; //IESIRE P3OUT &=~BIT7; //STARE 0 PM5CTL0 &= ~LOCKLPM5; // Disable the GPIO power-on default high-impedance mode // to activate previously configured port settings } // Rutina de tratare a intreruperilor de la WDT #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__) #pragma vector=WDT_VECTOR __interrupt void WDT_ISR(void) #elif defined(__GNUC__) void __attribute__ ((interrupt(WDT_VECTOR))) WDT_ISR (void) #else #error Compiler not supported! #endif { P3OUT ^= BIT7; // SCHIMBA STAREA P3.7 }
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