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Anonymous
verilog
11/30/2024 6:14 AM
456 B
14
Indexable
logic [N-1] cntr; // count to 2^N - 1
always_ff @ (posedge clk) begin
if (rst) begin
cntr <= ($bits(cntr))’(‘h0);
end
else begin
if (cntr == elapsed_time) begin
cntr <= ($bits(cntr))’(‘h0);
end
else begin
cntr <= cntr + ($bits(cntr))’(‘h1);
end
end
end
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