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full adder module FullAdder(SUM, CARRY, A, B, C); input A,B,C; output SUM,CARRY; wire W1, W2, W3; xor g1(W1,A,B); xor g2(SUM,W1,C); and g3(W2,A,B); and g4(W3,W1,C); or g5(CARRY,W2,W3); endmodule full adder module FullAdder_4bit(S,Cout,A,B); input[3:0]A; input[3:0]B; output[3:0]S; output Cout; wire[3:1]C; FullAdder FA0(S[0],C[1],A[0],B[0],1'b0); FullAdder FA1(S[1],C[2],A[1],B[1],C[1]); FullAdder FA2(S[2],C[3],A[2],B[2],C[2]); FullAdder FA3(S[3],Cout,A[3],B[3],C[3]); endmodule test bench module tb_adder_4bit; reg[3:0]A; reg[3:0]B; wire[3:0]S; wire Cout; adder_4bit uut(.S(S),.Cout(Cout),.A(A),.B(B)); initial begin A=5; B=5; #100 A=15; B=12; end endmodule 8 bit ALU module alu(A,B,ALU_Sel,ALU_Result); input[7:0]A; input[7:0]B; input[3:0]ALU_Sel; output[7:0]ALU_Result; reg[7:0]ALU_Result; always@(*) begin case(ALU_Sel) 4'b0000:ALU_Result=A+1; 4'b0001:ALU_Result=A+B; 4'b0010:ALU_Result=A-1; 4'b0011:ALU_Result=A-B; 4'b0100:ALU_Result=A*B; 4'b0101:ALU_Result=A==B; 4'b0110:ALU_Result=A>B; 4'b0111:ALU_Result=A<B; 4'b1000:ALU_Result=~A; 4'b1001:ALU_Result=A&B; 4'b1010:ALU_Result=A|B; 4'b1011:ALU_Result=~(A&B); 4'b1100:ALU_Result=~(A|B); 4'b1101:ALU_Result=A^B; 4'b1110:ALU_Result=A>>1; 4'b111:ALU_Result=A<<1; endcase end endmodule testhbench module alu_tb; reg[7:0]A,B; reg[3:0]ALU_Sel; wire[7:0]ALU_Result; alu uut(.A(A),.B(B),.ALU_Sel(ALU_Sel),.ALU_Result(ALU_Result)); initial begin #100 A=8'b10101111; B=8'b01001011; ALU_Sel=4'b0000; #100 A=8'b10101111; B=8'b01001011; ALU_Sel=4'b0001; #100 A=8'b10101111; B=8'b01001011; ALU_Sel=4'b0010; #100 A=8'b10101111; B=8'b01001011; ALU_Sel=4'b0011; #100 A=8'b10101111; B=8'b01001011; ALU_Sel=4'b0100; #100 A=8'b10101111; B=8'b01001011; ALU_Sel=4'b0101; #100 A=8'b10101111; B=8'b01001011; ALU_Sel=4'b0110; #100 A=8'b10101111; B=8'b01001011; ALU_Sel=4'b0111; #100 A=8'b10101111; B=8'b01001011; ALU_Sel=4'b1000; #100 A=8'b10101111; B=8'b01001011; ALU_Sel=4'b1001; #100 A=8'b10101111; B=8'b01001011; ALU_Sel=4'b1010; #100 A=8'b10101111; B=8'b01001011; ALU_Sel=4'b1011; #100 A=8'b10101111; B=8'b01001011; ALU_Sel=4'b1100; #100 A=8'b10101111; B=8'b01001011; ALU_Sel=4'b1101; #100 A=8'b10101111; B=8'b01001011; ALU_Sel=4'b1110; #100 A=8'b10101111; B=8'b01001011; ALU_Sel=4'b1111; end endmodule
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